Changelog
0.8.0
UVVM and OSVVM compiled once, VUnit's own package for JanusHDL, the design's files in the window, more of PSL, and fixes.
jhdl lib compile uvvm FOLDER(orosvvm) analyzes your copy of UVVM or OSVVM once and keeps a record of it: a design that names one of their libraries then finds it without listing its files, in every run, in the window and in the language server.jhdl lib listshows what is compiled,jhdl lib removeforgets it. UVVM's files are analyzed in compatibility mode whatever the design's.- VUnit has its own package for JanusHDL,
vunit-janushdl(VUnit 5.0.0.dev16 or later): add it inrun.pyand setVUNIT_SIMULATOR=janushdl. Its--guirecords a waveform and opens it injhdlw. VUnit 4 still runs through the front ends. - The window's Hierarchy tab lists the design's files under Files; a double click opens one in the code editor, and a double click on an instance (or Go to source in its menu) opens its source.
- PSL: replicated properties (
forall),union,nondetandnondet_vector(pseudo-random, the same on every run),ended, clocks nested in a property, value sets that begin with a range ({0 to 3}), androse(b, clk)and the other built-in functions with a clock argument as a whole Boolean. The operands offairnessdirectives are checked. - Memory: objects nothing reaches any more are reclaimed, in every VHDL version, so a long VHDL-2019 run, where
deallocateonly sets its argument tonull, no longer grows without bound. A large array ofstd_logicno longer needs some sixteen times its memory while it gets its default value. - A run that loads its analysis from the cache says in one line how many warnings the analysis had, instead of showing them all again.
- Now supported: a package or subprogram with a generic map of its own, a block whose generic constant is of a generic type of the block, an attribute of a configuration,
linkageports as sources of their actual, a configuration of an if or case generate by its alternative's label, a signal parameter associated by slices, andnullin a waveform to an aggregate target. - Stricter, as the standard requires: a procedure declared outside a process that assigns a signal other than its own signal parameters is an analysis error that says how to fix it (it stopped the run before); so are a name in parentheses as an assignment target and
othersin an aggregate target.
Fixed:
- An
inparameter of a constrained array subtype given a variable with other bounds has its own bounds; a signal parameter associated element by element has the formal's index range. - A guarded assignment to an aggregate target disconnects its signals; a port in a mode view drives the default of the elements nothing drives; an input port associated part by part with an expression or
inertialtakes it a delta later. - PSL:
eventually!of a sequence that had begun but not completed fails at the end of the run; a directive that reads another's'EVENTor'SIGNALsees the same cycle; a verification unit binds through generate statements;1 union 2parses. - In VHDL-2008, an object read through an access value after
deallocatewas given another stops the run with an error that says so. - An array or record variable given to an
inoutparameter is passed by reference whenever the parameter sees it with its own bounds, as UVVM's message ID panel expects. - A value given for a generic the top-level entity does not have (
-gfoo=1) is reported as a warning; it was dropped without a word. - IEEE 1735 protected code is reported once as not supported yet, the protected envelope left out of the analysis; it gave a page of errors.
- A Verilog or SystemVerilog file (
.v,.vh,.sv,.svh) is reported as not supported yet. - A call of a foreign subprogram (
'FOREIGN) without a VHDL body says that foreign code (VHPI) is not supported yet. jhdl-lsp --helpprints its usage instead of starting the server;jhdl lib --helpsays where the records are kept.- THIRD_PARTY_LICENSES.txt names JanusHDL's own license.
0.7.1
Fixes for what was reported after 0.7.0.
std.env.stopandstd.env.finishwith a status other than 0 now fail the run: the exit code is 1, and the summary saysstopped with status N. The status used to be ignored, with exit code 0. The window shows such a run as failed.- Runs that share one analysis cache (
--cache), such as a test runner's parallel tests, can no longer replace it with a half-written file when two of them save it at the same moment. --elaborate-only(analyze and elaborate, then exit without running) and--file-std(the VHDL version of the files that follow it, for a design that mixes versions) are now injhdl --helpand the manual. The manual also lists the other options and the exit code it was missing.
0.7.0
The first public release: free of charge, for anyone and any use, commercial work included, and you may share unchanged copies. For Windows, Linux x86-64 and 64-bit ARM Linux.
- Waveforms of any size: the viewer reads a recording a block at a time, as the screen needs it. A recording of 1.8 billion value changes (5.2 GB) opens in under four seconds, in less than a gigabyte of memory; zoomed out, it draws from summaries kept in the file, exactly as if it had read every change. VCD files of any size are read the same way.
- Why this value? Click a signal at a point in time: the processes that drive it, the signals they read, and which of them changed last, step by step back to the cause. A dataflow view, and the delta cycles of a time step (recorded by default;
--wave-deltas offto leave them out). - The wave view: a second cursor that measures time and frequency, named markers and the time between them, finding a value, analog rows, groups, rows computed from an expression of signals (
valid and ready,count = 10), and saving the view as a PNG or SVG image. - A code editor in the window: the analyzer's errors and warnings as you type, find and replace, find in files, several cursors, block (column) editing, split views of one file or two, folding.
- Projects (
.jhdlproj): the sources with their libraries and VHDL versions, the top, its generics and the options, in a text file made for version control;jhdl run my.jhdlproj, or File → New project in the window. Panels can be torn off into windows of their own. - Native code is on by default.
- Strict by default: code the standard forbids is an error, with the section of the standard and how to fix it;
--compatruns it with a warning instead (the front ends incompat/use it). - UVVM and OSVVM are no longer built in (0.5.0 and 0.6.0 had them): install them from their projects and analyze their sources with your design.
- Projects everywhere: the code editor, Find in files and the language server analyze a project's files as the project does (libraries, VHDL versions, settings); the Run dialog takes the VHDL version, generics and compatibility mode for a file list or a VHDL file.
- Generic values on the command line as VHDL writes them:
-gW=16#FF#,-gT=20ns,-gB=1,-gV=x"A5"; an error says which forms the type takes. - Typed files (
file of T) have a format of JanusHDL's own, with a header that tells a file of another type at once. Files written by earlier versions are not read; files ofcharacterstay raw bytes. - The full user manual, as web pages and as a PDF.
Fixed:
- Ports connected to part of a signal (an element, a slice, a record field), and ports connected piece by piece, were missing from the waveforms; packages of one name in two libraries shared one scope.
--wavetogether with--vcdwrote no VCD file and exited 0;--keep-goingexited 0 after analysis errors.jhdl --helplists the exit codes.- A design unit that needed one that failed to analyze got misleading follow-up errors; it now says which unit failed and where its errors are. Errors that
--compataccepts no longer cascade, and the last line says so. - The run's summary now says whether the stop time was reached or nothing was left to simulate.
- The front ends in
compat/analyze each file as the VHDL version its own command gave, and show paths as given. jhdlwtakes its options in any order.- A port's subtype is checked against its signal's (LRM 14.3.5), and
READof a file takes the form its type declares (LRM 5.5.2).
0.6.0
Mostly a GUI release, for Windows and Linux (x86-64), and now also for 64-bit ARM Linux such as the Raspberry Pi 5.
jhdlwmade over: a toolbar, panels you can drag, split and rearrange (the layout is kept), a start page with your recent files and runs, a status bar that shows how the simulation stands, and the system's own file dialogs.- Six themes: JanusHDL Dark and Light (following the system by default), One Dark, Dracula, Nord and Solarized Light.
- Simulation controls: pause and continue, run for a time, restart at time 0 (the design is analyzed again only if a source file changed), and a stop time per run.
- Waveforms show every VHDL type: records and arrays field by field (a row that opens into its parts), enumerations by name, reals, times with their unit, strings. Buses open into their bits.
- New radixes: octal, ASCII, fixed point (the binary point taken from
sfixedandufixed), floating point (half, single, double,float_pkg), Gray code and BCD. - Faster simulation: a quicker simulation cycle, and native code (
--jit on, still off by default) for much more of a testbench. - Linux ARM64: the same programs for 64-bit ARM, tested on a Raspberry Pi 5, with native code and the window on the Pi's GPU.
- Fixed: keyboard shortcuts with Shift ran the command without it.
0.5.0
The first preview, for Windows and Linux (x86-64).
- VHDL-1993, 2002, 2008 and 2019, with PSL assertions.
jhdl: analyze, elaborate and run in one command, from files or a project file; an analysis cache (--cache) that keeps the warnings too.jhdlw: waveforms, design hierarchy and sources, and simulation runs with their output in a terminal panel.jhdl-lsp: the language server for editors.- Native code for the busiest functions,
--jit on; new, off by default. - UVVM, OSVVM and VUnit testbenches run from their own sources; VUnit through the
compat/ghdlandcompat/nvcfront ends. - Front ends in
compat/for existing scripts:vsim,xsim,ghdlandnvccommand lines.